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(Senior) IC Layout Engineer

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Date: Feb 11, 2019

Location: hyderabad, AP, IN

Company: Micron

Req. ID: 128546 

Recruiter: JEFFERY CHU 

IC Layout Engineer/Senior IC Layout Engineer

Description

For nearly 40 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.  We are searching for IC Layout Engineer/Senior IC Layout Engineer in Micron Technology’s DRAM Engineering Group in India.

As an IC Layout Design Engineer/ Senior IC Layout Engineer, you will work in a highly innovative and motivated design team using state of the art memory technologies to advance DRAM Memory design. You will work closely with Micron's various design teams all over the world to contribute to the success of the design projects.

 

Responsibilities

  • Provide IC layout design support by performing floor planning, custom layout, Analog/Mix signal layout and fullchip level layout designs
  • Performing layout verification like LVS/DRC/DFM, etc. support, quality check and documentation
  • Work closely with Micron's global design teams in US, Japan, China, leverage vast resources available throughout Micron’s global sites to contribute to the success of Micron DRAM design projects

 

Requirement

  • Basic understanding of CMOS circuit layout structures required
  • IC custom layout working experience required
  • Proficiency with Cadence OA and Calibre verification tools desirable.
  • Understanding of basic CMOS circuits is a plus.
  • Understanding of memory IC layout experience is a plus.

Education

College degree (or above) in Electrical Engineering or other related engineering field.

We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

 

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

 

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

 

Keywords:  hyderabad || Andhra Pradesh (IN-AP) || India (IN) || DEG (DRAM Engineering Group) || Experienced || Regular || Engineering || Not Applicable || Tier 4 || 


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