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Senior Design Verification Engineer

Taipei, TPE, TW

Req. ID: 203421 

As a Design Verification Engineer within the 3DXP Media System Engineering at Micron, you will be responsible for defining efficient and coverage-driven testbench for high-quality design delivery.

Job Responsibilities

  • Verification plan definition, DV environment development in SV/UVM and SV/C
  • Design verification at RTL/Gate level, DV Coverage analysis, Coverage improvement at block and Chip level.
  • Support of assertion and coverage-driven methodology
  • Develop test cases in C/C++ to verify functional operation of that the system level
  • Power and Performance analysis
  • Design verification methodology enhancements



  • BSEE, MSEE, or related fields
  • More than 8+ year ASIC design and verification experience
  • Experience in PCIe, NVMe protocal and storage industry is a plus
  • In depth knowledge on verification methodology and flow
  • Familiar with UVM, System Verilog, scripting, and DV tools


According to the "Employment Service Act", positions with salary lower than NTD$40,000, please refer to the salary information in the job description. Positions with salary over than NTD$40,000 will be subject to be discussed during interview.


All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.


To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 and/or by completing our General Contact Form


Keywords:  Taipei || Taipei City (TW-TPE) || Taiwan (TW) || NVE (Non-Volatile Engineering Group) || Experienced || Regular || Engineering || #LI-CY1 || Tier 4 || 

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