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Singapore, 01, SG


Req. ID: 257282 


  • Responsible for new product startup and yield improvement
  • Support design verification and in-depth circuit of new products using CAD tools and Verilog simulations
  • Perform electrical failure analysis to understand the root cause of the different yield issues
  • Work with the wafer fab process/integration group to address process-related defects affecting product yield
  • Identify design marginalities and recommend design fix for circuit-related problems
  • Utilize state-of-art high-speed equipments to support product characterization and electrical failure analysis
  • Perform Read Window Budget (RWB) analysis



  • Bachelor's/Master's Degree in Electrical/Electronics Engineering
  • Good understanding of CMOS device physics
  • Knowledge of CMOS circuit design, CAD/Simulation and Read Window Budget analysis is an added advantage
  • NAND device knowledge is not a pre-requisite as training will be provided


Working Location: 990 Bendemeer Road, Singapore 339942


We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

Keywords:  Singapore || Central Singapore (SG-01) || Singapore (SG) || NVE (Non-Volatile Engineering Group) || Experienced || Regular || Engineering || #LI-KL1 ||

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