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Senior IC Design Engineer

Shanghai, 31, CN

Req. ID: 192841 

Recruiter: Irene LU 

Micron’s Profile

  • We have over 34,000 employees globally
  • We are the world’s 4th largest Semiconductor Company
  • We are ranked 105 in Fortune 500 company
  • We are certified as Best Companies to Work For® in Greater China 2018


We are a meaningful role at Micron's Shanghai Design Center, where we work in a highly innovative and motivated design team using state of the art memory technologies to develop & verify the most sophisticated DRAM product.

  • This role is an opportunity to challenge the complexity and difficulty of crafting/verifying high density memory chip with huge scale of circuit capability, Ultra-High Speed, complicated functionality (DDR5 LPDDR5), sophisticated low power and power management technology.
  • Harness design tools and techniques and challenging the cutting-edge memory products.
  • Travel to Japan and U.S. in short terms for technical communication and project support based on needs.
  • As part of a multi-disciplinary team, you will be highly involved in developing design methodology, as well as verification and implementation of mix-signal design verification environment.

Career Path/Development:

  • Global Opportunity: we work closely with Micron's various design teams in US, Japan, and other countries, acquiring global experience for your future career path within Micron!
  • Skill Advancement:
  • Be participated in the development of state-of-the-art memory products for various applications, such as cloud, high performance computing and consumer electronics, expand your knowledge of high bandwidth and low power designs;
  • Hands-on learning on best-in-class design and verification methodologies in memory industry to upgrades your skill sets!



  • Develop the new DRAM products by assisting with the overall conception, architecture evaluation, circuit design and optimization.
  • Deploy the RTL-IP with the standardized flow and continue improving the flow for high quality
  • Supporting the RTL-IP user for layout process including floor-planning, placement, and routing
  • Perform verification processes with modeling and simulation using industry standard simulators
  • Maintain technical expertise and provide training
  • Contribute to cross group communication to work towards standardization and group success
  • Proactively solicit input from Standards, CAD, modeling, and verification groups to ensure the design quality
  • Drive innovation into the future Memory generation with dynamic work environment
  • Build function and timing models for standard and custom cells
  • Perform Static Timing Analysis with industry lead EDA tools
  • Proactively seek inputs from Standards, CAD, modeling, and verification groups to ensure the design quality
  • Drive innovation into the future Memory generation with dynamic work environment
  • Build new methods and flows to improve the verification efficiency and coverage.



  • Knowledge and understanding of digital and analog circuits
  • Knowledge of CMOS device physics and layout
  • Good understanding on timing/area/power/complexity tradeoffs on complex interface design
  • Familiar with one or more off-chip protocols such as DDR an advantage
  • Familiar with IP level verification and strong RTL debugging capabilities
  • Experience in frontend implementation tasks such as synthesis, STA, and logic equivalence
  • Experience in large scale mix signal circuitry design including logic implementation/verification, timing analysis/optimization an advantage
  • Experience in memory product design (DRAM, SRAM, NAND, NOR..) would be a plus
  • Excellent problem-solving and analytical skills
  • A self-motivated, enthusiastic team player who enjoys working with others
  • Good communication skills with the ability to convey complex technical concepts to other design peers in verbal and written form
  • Strong English skill in both writing and speaking is a must


BS+, 8+years’ in Electrical Engineering is required

MS+, 5+years' in Electrical Engineering is required


All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s Human Resources Department at 1-800-336-8918 or 208-368-4748 and/or by completing our General Contact Form

Keywords:  Shanghai || Shanghai (CN-31) || China (CN) || DEG (DRAM Engineering Group) || Experienced || Regular || Engineering || #LI-IL1 || Tier 4 || 

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