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Senior Scribe Layout & Design Engineer - Technology Development

Hyderabad, AP, IN


Req. ID: 145603 


Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions.  This means conducting business with integrity, accountability, and professionalism while supporting our global community.  We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND, NOR, and 3D XPoint (TM) memory.


We are looking for a high-energy, ambitious, result-driven individual with strong work ethic and integrity to join us as a Sr. Scribe Layout & Design Engineer in Micron’s Technology Development Group, and in this role, you will be supporting development of advanced process technology through scribe test structure design and layout, CAD, and reticle creation.  


Job Responsibilities

  • Provide layout of test structure sets and custom digital designs in multiple technology nodes while working closely with scribe design and CAD engineers across the globe.
  • Perform layout verifications such as LVS/DRC/DFM/ERC, quality check, and provide accurate and timely documentation to ensure creation of parametric workbook.
  • Creation of schematic design and post layout simulation.
  • Own and support multiple projects in parallel through the Reticle Tapeout flow.
  • Support development of advanced memory solutions, including sub-1z DRAM and cutting-edge Non-Volatile memory chips.
  • Effectively interact and communicate with internal customers to understand the needs and deliver layouts test structures, memory array and custom digital designs.
  • Provide technical leadership and mentor junior staff.
  • The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment.



  • Bachelor or higher degree in Electrical/Electronics Engineering.
  • 10+ years of relevant experience in the fields of layout design, physical verification or related fields.
  • 2 or more years of experience in handling multiple custom IC layout projects.
  • Well versed in schematic design and post layout simulation.
  • Hands on experience with schematic entry, netlist extraction, and post layout verification.
  • Understanding of latch up and antenna effects in layout and their mitigation techniques.
  • Deep expertise in IC layout design tools such as Cadence Virtuoso and physical verification tools such as Calibre, Assura, or ICV.
  • Strong analytical, debug, and problem-solving skills in resolving layout issues related to physical verification and overall layout generation flow
  • Familiarity with semiconductor electrical fundamentals and device physics.
  • Capable of working in a cross functional and multi-site team environment spanning multiple time zones.


Other desired skills

  • Knowledge of semiconductor fabrication process in at least one technology such as DRAM, NAND, NOR or Logic.
  • Capability to create scripts to improve layout efficiency and workflow.
  • Experience with custom analog Design and layout for memory or an OEM is a plus.


Workplace Location




All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s Human Resources Department at 1-800-336-8918 or 208-368-4748 and/or by completing our General Contact Form

Keywords:  Hyderabad || Andhra Pradesh (IN-AP) || India (IN) || Technology Development || Experienced || Regular || Engineering || #LI-RR1 || Tier 4 || 

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