SYNTHESIS/STA Physical Design Engineer

Req. ID: 129156 

As an ASIC Synthesis/STA Engineer at Micron Technology, Inc., you will be Responsible for logic/physical Synthesis & timing closure at the chip and block level implementation for  high speed, complex integrated circuit designs. You will be tasked which might not be limited to executing static timing analysis, synthesis, formal verification and power analysis. Analyze results and work with the RTL designers and place / route team to resolve issues.

Successful candidates for this position will have: 

B. Tech. / M. Tech. with 4-8 years of experience in Synthesis, STA 
Expertise in synthesis of complex SoCs at block/top level and writing timing constraints for complex designs with multiple clocks and multiple voltage domains
Expertise on post layout timing closure for multiple tape outs, including timing ECOs and STA signoff
Expertise in I/O constraints developments.

Expertise in implementation of advance timing analysis techniques.
Hands-on experience of working on technology nodes like 28nm, 20nm, 14nm,10nm
Ability to understand advanced digital design architectures and clocking structures to help manage Functional/Scan/MBIST timing and physical design constraints

Ability to work with digital and analog circuit designers to analyze and explore timing challenges involved for complex designs integrating standard cell logic with high speed custom interface circuits

Good knowledge of EDA tools from RC, DC, PT, PTSI .

Experience in formal verification RTL-to-netlist and netlist-to-netlist with DFT constraints 
Good knowledge of VLSI process and device characteristics
Good understanding of deep submicron parasitic effects, crosstalk effects etc.TCL, perl scripting"

. 

We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

Keywords:  Hyderabad || Andhra Pradesh (IN-AP) || India (IN) || SSD Engineering || Experienced || Regular || Engineering || #LI-HN1 ||