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Block Level AMS Verification Engineer

Hyderabad, TG, IN

Req. ID: 235942 

Recruiter: SHANTOMONA BHARADWAJ 

[Senior] AMS Verification Engineer

 

Description

For nearly 40 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.  Our Global team is growing and we are looking for a passionate AMS Verification Engineer in Micron Technology’s DRAM and Emerging Memory Group (DEG) in India.

 

As an AMS Verification Engineer, you will work with a highly innovative and motivated design team using state of the art memory technologies to develop the most advanced DRAM and Emerging memory products. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high speed designs, complex functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will need to have the ability to work as an AMS Verification Enginee, to evaluate Full chip or block level functionality and provide solutions to help delivery of functionally correct design. You will work closely with Micron's various design and verification teams all over the world to contribute to the success of the design projects by applying verification tools and techniques, providing verification status and summaries to specific designs as needed.

 

Responsibilities

  1. Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
  2. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
  3. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.
  4. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
  5. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.

 

Requirements

  1. Good understanding of analog / mixed signal circuits.
  2. Experience in Analog and Mixed signal Verification
  3. Understand the usage of tools like Virtuoso, Finseim, Hspice, Xcellium, Simvision, Waveview.
  4. Hands on experience in writing Verilog, Verilog-A/MS, Real Number Models.
  5. Hands on experience in building SPICE testbenches at Block, Fullchip Level.
  6. Hand on experience in building the COSIM/ Mixed signal verification environment.
  7. Hands on experience in SV, UVM based Verification
  8. Hands on experience in SV/PSL assertions.
  9. Good scripting skills using perl, python is a plus.
  10. Previous work experience in DRAM memory related fields is a plus
  11. Must possess good communication, debugging skills and ability to work well in a team

 

Education

Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required

We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

 

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

 

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

 

Keywords:  Hyderabad || Telangana (IN-TG) || India (IN) || DEG (DRAM Engineering Group) || Experienced || Regular || Engineering || #LI-SB1 || Tier 4 || 

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