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Senior Engineer, NAND Design Rule

Boise, ID, US

Req Id: 213701 

Our vision is to transform how the world uses information to enrich life. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

 

The Micron NAND Process R&D group is responsible for developing state of the art high density NAND memory technologies. As an engineer within this organization you will be chartered with defining and maintaining physical design rules for current and future NAND technologies.

 

Responsibilities include, but are not limited to:

  • As a NAND Design Rule/Process Integration Engineer, your primary responsibility will be contributing to next-generation NAND development efforts.
  • You will be working to define, execute, and coordinate effective actions to enable the project to hit key achievements and time-lines.
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  • Responsibilities include but are not limited to, the following:
  • Team co-ordination
  • Co-ordinate the work of experienced engineers from Process Integration, Advanced Mask Design, Scribe & Frame, and Layout & Design to help direct development efforts for a new 3D NAND generation from early development until manufacturing ceases
  • Enthusiastically identify and address process issues and process window vs. die size conflicts stemming from specific database layout or layout techniques.
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  • Project responsibilities
  • Assure that the right DRC’s (Design Rule Checks) are in place, assure appropriate reaction to deviation from established design rules
  • Work with Yield Enhancement, Product Engineers, Defect Analysis, and Quality Assurance teams to understand process issues related to the database layout, and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design
  • Help design and evaluate test structures to provide data for next-generation devices, to quantify process margin on current devices
  • Summarize complex problems, derive and explain actions taken to address them
  • Drive effective multi-functional communication on issue resolution, and support across node Design Rule alignment
  • Define sub-milestones for the project within the layout schedule and work with the various teams to achieve the targets and time-lines
  • Maintain and enforce the best possible communication between Process Integration, Product Engineering, Advanced Mask Design, Scribe & Frame, Layout & Design
  • Assure timely documentation of the R&D activities regarding design rule improvements for transfer to parts still in the design
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  • Qualifications:
  • Successful candidates must have:
  • Minimum of 5 years of experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Test Structure Development, or Unit Process Development.
  • Exposure to design & layout, ability to do minor layout and to work with Pcells is highly desired
  • Proven capability to successfully resolve complex issues
  • Proven ability to think and communicate clearly in urgent and stressed situations
  • Understanding of the 3D NAND process flow, as well as the function and purpose of major NAND components, such as BL sensing, Word-line driver, CMOS under array, etc.
  • Familiarity with CAD group interactions, data post-processing, and the process of transferring data from the database to the reticle.
  • Previous experience in R&D for NAND (or other memory technologies) or working with-in YE, PE, PI or Photo is a plus.
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  • Education
  • MS/PhD plus 5 years’ experience in Electrical Engineering, Microelectronics, Physics or related discipline
  • Bachelor of Science Degree plus 10 years’ experience will also be considered

 

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About Micron Technology, Inc.

 

We are an industry leader in innovative memory and storage solutions. Through our global brands – Micron® and Crucial® – our broad portfolio of high-performance memory and storage technologies, including DRAM, NAND, 3D XPoint™ memory and NOR, is transforming how the world uses information to enrich life. Backed by more than 40 years of technology leadership, our memory and storage solutions enable disruptive trends, including artificial intelligence, 5G, machine learning and autonomous vehicles, in key market segments like mobile, data center, client, consumer, industrial, graphics, automotive, and networking. Our common stock is traded on the Nasdaq under the MU symbol. To learn more visit micron.com/careers.

 

Micron believes that all persons are entitled to equal employment opportunities. Micron recruits, hires, trains, promotes, disciplines and provides other conditions of employment without regard to a person’s race, color, ethnicity, religion, gender, gender identity, or expression, age, national origin, disability, veteran’s status, sexual orientation, marital status or other classifications protected under law or Company policy. This includes providing reasonable accommodation for team members’ disabilities or religious beliefs and practices. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

 

To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s Human Resources Department at HR4U@micron.com.

 

Keywords: Boise || Idaho (US-ID) || United States (US) || Technology Development || Experienced || Regular || Engineering || #LI-GC1 ||

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