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DRAM Design Engineer

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Date: Feb 11, 2019

Location: Boise, ID, US

Company: Micron

Req. ID: 124407 

Recruiter: Tim Berti 

Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.


As a Senior DRAM Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. This includes simulating, optimizing, and floor planning DRAM circuits. In this position you will work and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will also be responsible parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions.


Responsibilities include, but not limited to:


Contribute to the Development of New Memory Products by Assisting with the Overall Design, Layout, and Optimization of Memory Circuits.

  • Perform circuit simulations using standard industry simulators such as SPICE and VERILOG
  • Assist in design and development of schematic blocks such as memory array, input buffer, output buffer, control logic, address decode, datapath, and internal test logic
  • Participate in new circuit conception and design as needed
  • Responsible for reliability verification
  • Ability to interpret device specification to produce required functionality


Oversee and Manage the Layout Process

  • Manage floor-planning process, including placement and routing optimization
  • Optimize design rules for cost, performance and functionality
  • Import layout parasitic information into circuit simulation environment


Define Array Blocks and Pitch Cells

  • Verify proper wordline and digitline lengths
  • Understand the impact of array architecture decisions on overall power, speed, and die size
  • Choose appropriate transistor sizes and types for pitch cells for Vcell margin and performance


Manage Verification Processes

  • Perform silicon versus schematic versus layout verification on required circuits
  • Responsible for simulation, verilog and parasitic modeling
  • Assist in silicon design validation, reticle experiments, and tape-out revisions as needed


Maintain Technical Expertise and Provide Training

  • Aid in communicating best known practices to entire department
  • Prepare detailed Documentation as required
  • Contribute and participate in global Design forums
  • Participate in continuing education and competitor analysis


Contribute to Cross Group Communication to Work Towards Standardization and Group Success

  • Work with Marketing, Probe, Assembly, Test, Process Integration, CAD, and Product Engineering groups to ensure proper manufacturability of product
  • Proactively solicit input from various groups (i.e. Standard cell development; simulation, voltages)


Minimum Qualifications:


  • Bachelor Degree in Electrical Engineering
  • Minimum of 5 years of DRAM experience


About Us


As the leader in innovative memory solutions, Micron is helping the world make sense of data by delivering technology that is transforming how the world uses information. Through our global brands — Micron, Crucial and Ballistix — we offer the industry’s broadest portfolio. We are the only company manufacturing today’s major memory and storage technologies: DRAM, NAND, NOR and 3D XPoint™ memory. Our solutions are purpose built to leverage the value of data to unlock financial insights, accelerate scientific breakthroughs and enhance communication around the world.


Micron Benefits


Employee Rewards Program, Healthcare, Paid time off (Combined Sick and Vacation Time), Retirement savings plans, Paid maternity/paternity leave, Employee Assistance Program, Professional development training, Workplace wellness programs, Micron Health Clinic (Boise only), Fitness Center / Activity rooms (Boise only), Tuition Reimbursement, Micron Corporate Discounts, Casual Dress attire.


We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.


Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.


To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).


Keywords:  Boise || Idaho (US-ID) || United States (US) || DEG (DRAM Engineering Group) || Experienced || Regular || Engineering || #LI-LP1 || Tier 4 || 

Nearest Major Market: Boise
Nearest Secondary Market: Meridian

Job Segment: Manufacturing Engineer, Engineer, CAD, Drafting, Electrical, Engineering