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Date: Jun 8, 2019

Location: Avezzano, AQ, IT

Company: Micron


Req. ID: 124681 

As a Design Engineer, you will be responsible for the development of new memory products through:

  • New circuit conception and design
  • Design optimization of memory circuits (such as pitched cells, datapath, pumps & regulators, I/O, Logic, etc.).   Such optimization tasks include logic/sizing/parasitic simulation, verification, and silicon validation, as well as IC layout.   


The candidate will be responsible for:

  • Understand design specification at the chip level and breakdown of functions into circuits, sub components, in the analog and/or digital domain.
  • Create schematic description of circuit functions at the schematic level or behavioral level, using industry available capture tools, such as Cadence Composer and the Verilog behavioral language.
  • Verify the circuit functionality in the analog and/or logic domain, using industry available simulators such as Hspice, Hsim for the electrical analysis and NC-Verilog for the digital design verification
  • Provide design documentation (schematic, behavioral, simulation) at the circuit level and chip level.
  • Act for timely blocks’ integration and verification, looking in advance for  any issue that may arise against an optimal and efficient integration and full chip verification process.
  • Provide clear directions and documentation and interact with the layout team to ensure that the block layout is fully compliant with the designers’ expectations in terms of performances.
  • Cooperate with PE for a fast silicon debug and verification.


Skills and competencies requested are:

  • Have the ability to work in team
  • Be result oriented, continuous improvement attitude
  • Have a quick grasp as to the impact of issues, in order to plan and prioritize activities accordingly; to ensure global optimization of the Design team's processes and needs
  • Capable of fostering proposed solutions through clear and effective documentation
  • Participate in internal project meetings and teamwork activities, contributing in the identification of best practices and solutions to be adopted
  • Good knowledge of  MOS Transistors operation / modeling
  • Basic knowledge of non volatile memory process and device operation .


    Competencies below are welcome but not strictly necessary :


  • Experience with basic circuit design and simulation techniques is a plus
  • Proficiency with UNIX  software is a plus


Education requested:

             Master Degree Electronic Engineering   

We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

Keywords:  Avezzano || L'Aquila (IT-AQ) || Italy (IT) || NVE (Non-Volatile Engineering Group) || Experienced || Regular || Engineering || Not Applicable ||

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