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Campus_2019届_IC Design Verification Engineer (实习生)

Date: Nov 26, 2017

Location: shanghai, 31, CN

Company: Micron

 

Req. ID: 94677 

本岗位为实习生岗位, 我们更期待2019年毕业的硕士研究生应聘此岗位。

This is the internship position, Master graduates in 2019 will be preferred.

 

Job Description:

As a Verification Designer at Micron's Shanghai Design Center, you will work in a highly innovative and motivated design team using state of the art memory technologies to develop & verify the most advanced DRAM product.

You will be challenged by the complexity and difficulty of designing/verifying the high density memory chip (up to 8Gb) with huge scale of circuit capability (over 4M transistors), ultra-high speed (clock cycle is less than 1ns), complicated functionality (DDR4, LPDDR4), advanced low power and power management technology.

You will need to have the ability to work as a design verification engineer and consider as a circuit designer to full evaluate chip or block level functionality and provide solution.

You will work closely with Micron's various design teams all over the world to contribute to the success of the design team by applying verification tools and techniques, providing verification status and summaries to specific designs as needed.

You may need to travel to Japan and U.S. in short term for technical communication, project support.

You will participate in developing digital/analog mix-signal verification methodology for advanced DRAM products, as well as design and implementation of mix-signal design verification environment.

As an important part of responsibility, you will develop and maintain test benches and test vectors using digital and analog simulation tools.

 

Responsibilities:

?              Develop patterns and regressions to increase the function coverage for all DRAM architectures and features.

?              Provide support to design engineers, simulate, analyze and debug current chip designs.

?              Co-work with international colleagues on developing new verification tools and flows for the verification difficulties on DRAM chip.

 

Requirements:

?              Basic understanding of CMOS circuit design

?              Familiar with analog/digital simulation tools, ie. HSPICE, HSIM, VerilogHDL, FINESIM

?              Must possess good communication skills and ability to work well in a team

?              Experience in SV, VPI coding preferred

?              Gate Level circuit design preferred

?              English language skill in writing and speaking is a must

 

Education

?              MS or BS degree in Electronic Engineering or Microelectronics or other related engineering field.


We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.


Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.


To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).


Keywords:  shanghai || Shanghai (CN-31) || China (CN) || DEG (DRAM Engineering Group) || Entry || Internship || Engineering || Not Applicable ||
 


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