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IC Design Verification Engineer

Date: Feb 28, 2018

Location: Shanghai, 31, CN

Company: Micron


Req. ID: 96621 

Recruiter: Jeffery Chu

IC Design Verification Engineer(集成电路设计验证)




  • As a Verification Designer at Micron's Shanghai Design Center, you will work in a highly innovative and motivated design team using state of the art memory technologies to develop & verify the most advanced DRAM product.
  • You will be challenged by the complexity and difficulty of designing/verifying the  high density memory chip (up to 8Gb) with huge scale of circuit capability (over 4M transistors), ultra high speed (clock cycle is less than 1ns), complicated functionality (DDR4, LPDDR4), advanced low power and power management technology.
  • You will need to have the ability to work as a design verification engineer and consider as a circuit designer to full evaluate chip or block level functionality and provide solution.
  • You will work closely with Micron's various design teams all over the world to contribute to the success of the design team by applying verification tools and techniques, providing verification status and summaries to specific designs as needed.
  • You may need to travel to Japan and U.S. in short term for technical communication, project support.
  • You will participate in developing digital/analog mix-signal verification methodology for advanced DRAM products, as well as design and implementation of mix-signal design verification environment.
  • As an important part of responsibility, you will develop and maintain test benches and test vectors using digital and analog simulation tools.




  • Develop patterns and regressions to increase the function coverage for all DRAM architectures and features.
  • Provide support to design engineers, simulate, analyze and debug current chip designs.
  • Co-work with international colleagues on developing new verification tools and flows for the verification difficulties on DRAM chip.



  • Basic understanding of CMOS circuit design
  • Familiar with analog/digital simulation tools, ie. HSPICE, HSIM, VerilogHDL, FINESIM
  • Must possess good communication skills and ability to work well in a team
  • Experience in SV, VPI coding preferred
  • Gate Level circuit design preferred
  • Experience in UVM Test Bench preferred
  • Previous work experience in DRAM memory related fields a plus
  • English language skill in writing and speaking is a must




BS or MS in Electrical Engineering is required


We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

Keywords:  Shanghai || Shanghai (CN-31) || China (CN) || DEG (DRAM Engineering Group) || Experienced || Regular || Engineering || Not Applicable ||

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