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Emerging Memory Layout Design Engineer

Date: Apr 12, 2018

Location: Folsom, CA, US

Company: Micron


Req. ID: 110522 

As an Emerging Memory (EM) Layout Design Engineer in Micron's Technology Development (R&D) organization, you will implement the layout and run the layout verification flows including LVS, DRC, ESD, Latch-up, Density Check, etc. for large scale custom design projects that will include both Analog and Digital circuits. In addition to the layout and verification of the circuits, you will also be responsible for floor planning the large block or full chip and supervising the floor planning of the sub blocks of the chip. Additionally responsibilities include assembling the full chip and preparing the full chip database for Mask Generation.


Job Responsibilities:


  • Must have strong skills in leaf level layout, hands on layout of transistor level, custom layout, floor planning, matching techniques and manual routing
  • Be able to learn and understand complex design rules and deliver quality layout
  • Understanding of layout methodology from initial chip plan to tapeout
  • Collaberate with circuit design engineers to understand layout requirements
  • Strong debug and problem-solving skills for LVS, DRC and layout issues without much supervision
  • Experience with Cadence Virtuoso, VXL, Calibre tool
  • Independent with strong analytical skills, creative thinking and self-motivated
  • The position requires an individual with the ability to learn rapidly and adapt quickly to changing situations
  • Layout experience on DRAM or NAND or SRAM is plus




Successful candidates for this position will have

  • Strong communication skills
  • Strong leadership skills
  • Experience coordinating and supervising the work of others.
  • Experience in layout design on non-volatile memory
  • Familiarity with CAD and EDA tools including Cadence Virtuoso, Calibre & Hercules.
  • Knowledge of programming languages like Perl, Skill and Shell scripting.



Associates Degree with 3-5 years of experience or Bachelors/Masters Degree in Electrical Engineering. 

We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.

Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).

Keywords:  Folsom || California (US-CA) || United States (US) || Technology Development || Experienced || Regular || Engineering || #LI-DK1 ||

Nearest Major Market: Sacramento

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