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R&D Yield Enhancement Engineer-PFA

Date: Oct 6, 2017

Location: Boise, ID, US

Company: Micron

Relocation Level:  YES

Hiring Manager: Michael Dao

Recruiter:  Mandy Kayler 

 

Are you interested in joining a team that is defining the next generation of memory devices?  Do you excel at device physics, analyzing data, and solving problems?  If so, you may make a great candidate for the Yield Enhancement Engineer position in Micron’s cutting-edge Research and Development organization located in Boise, Idaho.

 

As a Yield Enhancement Engineer, you will analyze probe, parametric, and fabrication data to identify causes of device failures.  You will help prioritize lab workflows, analyze the results of process experiments, and assist in the identification of yield excursions.  You will also work as part of a team that transfers new processes into a production environment, including the training of new techniques for yield analysis and enhancement engineers.

 

Other duties include working with product engineering and probe engineering to resolve probe bin issues and margin bin fallout; support and develop new tools and techniques to localize and identify die failures; recognize, identify, and raise awareness to new or critical process issues; attend necessary meetings and present critical results (both presentation and report format) of yield issues to process engineering and process integration.

 

Successful candidate for this position will have:

  • A fundamental understanding of device physics, such as transistor operation or diode leakage.
  • Familiarity with semiconductor manufacturing and the in Fab processes that are involved
  • Good analytical and problem solving skills.
  • Ability to drive results
  • Strong communication skills (written, verbal and presentation)
  • Good computer skills, including working knowledge of JMP, UNIX, and M.S. Office
  • Minimum 1-3 years’ work experience with volatile/non-volatile memory (preferred)
  • Knowledge of bit mapping procedures like array topology and knowledge of test modes, product architecture, cell operation and related topics. (Preferred)
  • Experience with CAD layout of semiconductor devices (Preferred)
  • Theory and/or operation of SEMs, FIBs, and emission microscopes. (Preferred)

 

Education:
B.S. degree with 5 years’ industry related experience or a Masters/PhD

Degree should be from the  following: Electrical Engineering, Chemical Engineering, Materials Science Engineering, Physics, or related field.

 


It has been and will continue to be the policy of Micron to administer all human resource actions and benefits without regard to race, religion, color, sex, national origin, age, disability, sexual orientation, veteran's or other legally-protected status. Each manager, supervisor, and team member is responsible for carrying out this policy.

The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters. To request assistance with the application process, please contact Micron’s Human Resources Department at 1-800-336-8918 (or 208-368-4748).


Keywords: Boise || Idaho (US-ID) || United States (US) || Technology Development || College || Regular || Engineering || *LI-DK1 ||


Nearest Major Market: Boise
Nearest Secondary Market: Meridian

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